PV4 リリース番号: 04
--------------------------------------------------------------------------------
Release 9.2.04i Trace
Copyright (c) 1995-2007 Xilinx, Inc. All rights reserved.
D:\Xilinx92i\bin\nt\trce.exe -ise E:/RTL/_/PV.ise -intstyle ise -e 3 -s 4 -xml
PV PV.ncd -o PV.twr PV.pcf -ucf E:/RTL/Code/UCF/PV.ucf
Design file: pv.ncd
Physical constraint file: pv.pcf
Device,package,speed: xc3s200a,ft256,-4 (PRODUCTION 1.38 2007-10-19)
Report level: error report
Environment Variable Effect
-------------------- ------
NONE No environment variables were set
--------------------------------------------------------------------------------
INFO:Timing:2752 - To get complete path coverage, use the unconstrained paths
option. All paths that are not constrained will be reported in the
unconstrained paths section(s) of the report.
INFO:Timing:3339 - The clock-to-out numbers in this timing report are based on
a 50 Ohm transmission line loading model. For the details of this model,
and for more information on accounting for different loading conditions,
please see the device datasheet.
================================================================================
Timing constraint: TS_pci_clock = PERIOD TIMEGRP "pci_clock" 30 ns HIGH 50%;
132328 items analyzed, 0 timing errors detected. (0 setup errors, 0 hold errors)
Minimum period is 18.578ns.
--------------------------------------------------------------------------------
================================================================================
Timing constraint: TS_video_clock = PERIOD TIMEGRP "video_clock" 13.48 ns HIGH
50%;
49411 items analyzed, 0 timing errors detected. (0 setup errors, 0 hold errors)
Minimum period is 10.477ns.
--------------------------------------------------------------------------------
================================================================================
Timing constraint: TS_clock_pci_ram_clock = PERIOD TIMEGRP
"clock_pci_ram_clock" TS_pci_clock / 3 HIGH 50%;
6469 items analyzed, 0 timing errors detected. (0 setup errors, 0 hold errors)
Minimum period is 8.167ns.
--------------------------------------------------------------------------------
================================================================================
Timing constraint: TIMEGRP "pci_in_7" OFFSET = IN 6.05 ns VALID 6.05 ns BEFORE
COMP "in_pci_clock";
704 items analyzed, 0 timing errors detected. (0 setup errors, 0 hold errors)
Minimum allowable offset is 6.040ns.
--------------------------------------------------------------------------------
================================================================================
Timing constraint: TIMEGRP "pci_in_10" OFFSET = IN 9 ns VALID 9 ns BEFORE COMP
"in_pci_clock";
105 items analyzed, 0 timing errors detected. (0 setup errors, 0 hold errors)
Minimum allowable offset is 6.546ns.
--------------------------------------------------------------------------------
================================================================================
Timing constraint: TIMEGRP "pci_out_11" OFFSET = OUT 10 ns AFTER COMP
"in_pci_clock";
84 items analyzed, 0 timing errors detected.
Minimum allowable offset is 9.741ns.
--------------------------------------------------------------------------------
================================================================================
Timing constraint: TIMEGRP "pci_out_12" OFFSET = OUT 11 ns AFTER COMP
"in_pci_clock";
1 item analyzed, 0 timing errors detected.
Minimum allowable offset is 8.027ns.
--------------------------------------------------------------------------------
================================================================================
Timing constraint: TIMEGRP "video_in" OFFSET = IN 1.37 ns VALID 4.24 ns BEFORE
COMP "in_video_clock" TIMEGRP video_rising;
16 items analyzed, 0 timing errors detected. (0 setup errors, 0 hold errors)
Offset is -0.071ns.
--------------------------------------------------------------------------------
================================================================================
Timing constraint: TIMEGRP "video_in" OFFSET = IN -5.37 ns VALID 4.24 ns BEFORE
COMP "in_video_clock" TIMEGRP video_falling;
15 items analyzed, 0 timing errors detected. (0 setup errors, 0 hold errors)
Offset is -6.822ns.
--------------------------------------------------------------------------------
All constraints were met.
Data Sheet report:
-----------------
All values displayed in nanoseconds (ns)
Setup/Hold to clock in_pci_clock
-------------+------------+------------+------------------+--------+
| Setup to | Hold to | | Clock |
Source | clk (edge) | clk (edge) |Internal Clock(s) | Phase |
-------------+------------+------------+------------------+--------+
in_pci_gnt | 6.546(R)| -0.714(R)|clock_pci | 0.000|
in_pci_idsel | 1.951(R)| -0.322(R)|clock_pci | 0.000|
io_pci_ad<0> | 1.981(R)| -0.357(R)|clock_pci | 0.000|
io_pci_ad<1> | 1.984(R)| -0.361(R)|clock_pci | 0.000|
io_pci_ad<2> | 1.981(R)| -0.357(R)|clock_pci | 0.000|
io_pci_ad<3> | 1.984(R)| -0.361(R)|clock_pci | 0.000|
io_pci_ad<4> | 2.015(R)| -0.398(R)|clock_pci | 0.000|
io_pci_ad<5> | 1.991(R)| -0.368(R)|clock_pci | 0.000|
io_pci_ad<6> | 2.015(R)| -0.398(R)|clock_pci | 0.000|
io_pci_ad<7> | 1.991(R)| -0.368(R)|clock_pci | 0.000|
io_pci_ad<8> | 2.010(R)| -0.391(R)|clock_pci | 0.000|
io_pci_ad<9> | 2.004(R)| -0.385(R)|clock_pci | 0.000|
io_pci_ad<10>| 2.010(R)| -0.391(R)|clock_pci | 0.000|
io_pci_ad<11>| 1.974(R)| -0.349(R)|clock_pci | 0.000|
io_pci_ad<12>| 1.979(R)| -0.355(R)|clock_pci | 0.000|
io_pci_ad<13>| 1.994(R)| -0.373(R)|clock_pci | 0.000|
io_pci_ad<14>| 1.979(R)| -0.355(R)|clock_pci | 0.000|
io_pci_ad<15>| 1.996(R)| -0.375(R)|clock_pci | 0.000|
io_pci_ad<16>| 2.027(R)| -0.411(R)|clock_pci | 0.000|
io_pci_ad<17>| 2.021(R)| -0.404(R)|clock_pci | 0.000|
io_pci_ad<18>| 1.958(R)| -0.330(R)|clock_pci | 0.000|
io_pci_ad<19>| 1.968(R)| -0.342(R)|clock_pci | 0.000|
io_pci_ad<20>| 2.006(R)| -0.386(R)|clock_pci | 0.000|
io_pci_ad<21>| 2.006(R)| -0.386(R)|clock_pci | 0.000|
io_pci_ad<22>| 1.958(R)| -0.330(R)|clock_pci | 0.000|
io_pci_ad<23>| 1.968(R)| -0.342(R)|clock_pci | 0.000|
io_pci_ad<24>| 2.040(R)| -0.426(R)|clock_pci | 0.000|
io_pci_ad<25>| 1.951(R)| -0.322(R)|clock_pci | 0.000|
io_pci_ad<26>| 1.953(R)| -0.324(R)|clock_pci | 0.000|
io_pci_ad<27>| 1.872(R)| -0.229(R)|clock_pci | 0.000|
io_pci_ad<28>| 2.041(R)| -0.428(R)|clock_pci | 0.000|
io_pci_ad<29>| 1.872(R)| -0.229(R)|clock_pci | 0.000|
io_pci_ad<30>| 2.041(R)| -0.428(R)|clock_pci | 0.000|
io_pci_ad<31>| 2.028(R)| -0.412(R)|clock_pci | 0.000|
io_pci_cbe<0>| 5.475(R)| -0.385(R)|clock_pci | 0.000|
io_pci_cbe<1>| 5.341(R)| -0.349(R)|clock_pci | 0.000|
io_pci_cbe<2>| 5.034(R)| -0.379(R)|clock_pci | 0.000|
io_pci_cbe<3>| 5.601(R)| -0.322(R)|clock_pci | 0.000|
io_pci_devsel| 5.580(R)| -1.041(R)|clock_pci | 0.000|
io_pci_frame | 5.925(R)| -0.179(R)|clock_pci | 0.000|
io_pci_irdy | 5.989(R)| -0.345(R)|clock_pci | 0.000|
io_pci_stop | 5.386(R)| -0.478(R)|clock_pci | 0.000|
io_pci_trdy | 6.040(R)| -0.764(R)|clock_pci | 0.000|
-------------+------------+------------+------------------+--------+
Setup/Hold to clock in_video_clock
-------------------+------------+------------+------------------+--------+
| Setup to | Hold to | | Clock |
Source | clk (edge) | clk (edge) |Internal Clock(s) | Phase |
-------------------+------------+------------+------------------+--------+
in_video_data<0> | -0.133(R)| 1.675(R)|clock_video | 0.000|
| -6.873(F)| 8.415(F)|clock_video | 6.740|
in_video_data<1> | -0.123(R)| 1.664(R)|clock_video | 0.000|
| -6.863(F)| 8.404(F)|clock_video | 6.740|
in_video_data<2> | -0.104(R)| 1.641(R)|clock_video | 0.000|
| -6.844(F)| 8.381(F)|clock_video | 6.740|
in_video_data<3> | -0.091(R)| 1.626(R)|clock_video | 0.000|
| -6.831(F)| 8.366(F)|clock_video | 6.740|
in_video_data<4> | -0.091(R)| 1.626(R)|clock_video | 0.000|
| -6.831(F)| 8.366(F)|clock_video | 6.740|
in_video_data<5> | -0.091(R)| 1.626(R)|clock_video | 0.000|
| -6.831(F)| 8.366(F)|clock_video | 6.740|
in_video_data<6> | -0.114(R)| 1.653(R)|clock_video | 0.000|
| -6.854(F)| 8.393(F)|clock_video | 6.740|
in_video_data<7> | -0.123(R)| 1.664(R)|clock_video | 0.000|
| -6.863(F)| 8.404(F)|clock_video | 6.740|
in_video_data<8> | -0.087(R)| 1.621(R)|clock_video | 0.000|
| -6.827(F)| 8.361(F)|clock_video | 6.740|
in_video_data<9> | -0.087(R)| 1.621(R)|clock_video | 0.000|
| -6.827(F)| 8.361(F)|clock_video | 6.740|
in_video_data<10> | -0.082(R)| 1.615(R)|clock_video | 0.000|
| -6.822(F)| 8.355(F)|clock_video | 6.740|
in_video_data<11> | -0.082(R)| 1.615(R)|clock_video | 0.000|
| -6.822(F)| 8.355(F)|clock_video | 6.740|
in_video_data<12> | -0.133(R)| 1.675(R)|clock_video | 0.000|
| -6.873(F)| 8.415(F)|clock_video | 6.740|
in_video_data<13> | -0.112(R)| 1.651(R)|clock_video | 0.000|
| -6.852(F)| 8.391(F)|clock_video | 6.740|
in_video_data<14> | -0.122(R)| 1.663(R)|clock_video | 0.000|
| -6.862(F)| 8.403(F)|clock_video | 6.740|
in_video_horizontal| -0.071(R)| 1.603(R)|clock_video | 0.000|
-------------------+------------+------------+------------------+--------+
Clock in_pci_clock to Pad
-------------+------------+------------------+--------+
| clk (edge) | | Clock |
Destination | to PAD |Internal Clock(s) | Phase |
-------------+------------+------------------+--------+
io_pci_ad<0> | 8.636(R)|clock_pci | 0.000|
io_pci_ad<1> | 9.395(R)|clock_pci | 0.000|
io_pci_ad<2> | 8.650(R)|clock_pci | 0.000|
io_pci_ad<3> | 8.916(R)|clock_pci | 0.000|
io_pci_ad<4> | 8.653(R)|clock_pci | 0.000|
io_pci_ad<5> | 8.654(R)|clock_pci | 0.000|
io_pci_ad<6> | 9.472(R)|clock_pci | 0.000|
io_pci_ad<7> | 8.617(R)|clock_pci | 0.000|
io_pci_ad<8> | 8.927(R)|clock_pci | 0.000|
io_pci_ad<9> | 8.653(R)|clock_pci | 0.000|
io_pci_ad<10>| 8.524(R)|clock_pci | 0.000|
io_pci_ad<11>| 7.968(R)|clock_pci | 0.000|
io_pci_ad<12>| 7.966(R)|clock_pci | 0.000|
io_pci_ad<13>| 8.922(R)|clock_pci | 0.000|
io_pci_ad<14>| 8.237(R)|clock_pci | 0.000|
io_pci_ad<15>| 8.511(R)|clock_pci | 0.000|
io_pci_ad<16>| 8.233(R)|clock_pci | 0.000|
io_pci_ad<17>| 8.064(R)|clock_pci | 0.000|
io_pci_ad<18>| 8.535(R)|clock_pci | 0.000|
io_pci_ad<19>| 8.471(R)|clock_pci | 0.000|
io_pci_ad<20>| 8.492(R)|clock_pci | 0.000|
io_pci_ad<21>| 8.381(R)|clock_pci | 0.000|
io_pci_ad<22>| 8.672(R)|clock_pci | 0.000|
io_pci_ad<23>| 8.585(R)|clock_pci | 0.000|
io_pci_ad<24>| 8.588(R)|clock_pci | 0.000|
io_pci_ad<25>| 8.733(R)|clock_pci | 0.000|
io_pci_ad<26>| 8.412(R)|clock_pci | 0.000|
io_pci_ad<27>| 8.563(R)|clock_pci | 0.000|
io_pci_ad<28>| 8.465(R)|clock_pci | 0.000|
io_pci_ad<29>| 9.741(R)|clock_pci | 0.000|
io_pci_ad<30>| 8.164(R)|clock_pci | 0.000|
io_pci_ad<31>| 8.679(R)|clock_pci | 0.000|
io_pci_cbe<0>| 8.035(R)|clock_pci | 0.000|
io_pci_cbe<1>| 8.517(R)|clock_pci | 0.000|
io_pci_cbe<2>| 7.759(R)|clock_pci | 0.000|
io_pci_cbe<3>| 8.094(R)|clock_pci | 0.000|
io_pci_devsel| 8.256(R)|clock_pci | 0.000|
io_pci_frame | 7.715(R)|clock_pci | 0.000|
io_pci_irdy | 8.141(R)|clock_pci | 0.000|
io_pci_stop | 7.848(R)|clock_pci | 0.000|
io_pci_trdy | 8.179(R)|clock_pci | 0.000|
out_pci_par | 8.387(R)|clock_pci | 0.000|
out_pci_req | 8.027(R)|clock_pci | 0.000|
-------------+------------+------------------+--------+
Clock to Setup on destination clock in_pci_clock
---------------+---------+---------+---------+---------+
| Src:Rise| Src:Fall| Src:Rise| Src:Fall|
Source Clock |Dest:Rise|Dest:Rise|Dest:Fall|Dest:Fall|
---------------+---------+---------+---------+---------+
in_pci_clock | 18.578| | 3.215| |
---------------+---------+---------+---------+---------+
Clock to Setup on destination clock in_video_clock
---------------+---------+---------+---------+---------+
| Src:Rise| Src:Fall| Src:Rise| Src:Fall|
Source Clock |Dest:Rise|Dest:Rise|Dest:Fall|Dest:Fall|
---------------+---------+---------+---------+---------+
in_video_clock | 10.477| 4.253| | |
---------------+---------+---------+---------+---------+
TIMEGRP "pci_in_7" OFFSET = IN 6.05 ns VALID 6.05 ns BEFORE COMP "in_pci_clock";
Worst Case Data Window 5.861; Ideal Clock Offset To Actual Clock 0.084;
-------------+------------+------------+---------+---------+-------------+
| | | Setup | Hold |Source Offset|
Source | Setup | Hold | Slack | Slack | To Center |
-------------+------------+------------+---------+---------+-------------+
in_pci_idsel | 1.951(R)| -0.322(R)| 4.099| 0.322| 1.889|
io_pci_ad<0> | 1.981(R)| -0.357(R)| 4.069| 0.357| 1.856|
io_pci_ad<1> | 1.984(R)| -0.361(R)| 4.066| 0.361| 1.853|
io_pci_ad<2> | 1.981(R)| -0.357(R)| 4.069| 0.357| 1.856|
io_pci_ad<3> | 1.984(R)| -0.361(R)| 4.066| 0.361| 1.853|
io_pci_ad<4> | 2.015(R)| -0.398(R)| 4.035| 0.398| 1.819|
io_pci_ad<5> | 1.991(R)| -0.368(R)| 4.059| 0.368| 1.846|
io_pci_ad<6> | 2.015(R)| -0.398(R)| 4.035| 0.398| 1.819|
io_pci_ad<7> | 1.991(R)| -0.368(R)| 4.059| 0.368| 1.846|
io_pci_ad<8> | 2.010(R)| -0.391(R)| 4.040| 0.391| 1.825|
io_pci_ad<9> | 2.004(R)| -0.385(R)| 4.046| 0.385| 1.831|
io_pci_ad<10>| 2.010(R)| -0.391(R)| 4.040| 0.391| 1.825|
io_pci_ad<11>| 1.974(R)| -0.349(R)| 4.076| 0.349| 1.863|
io_pci_ad<12>| 1.979(R)| -0.355(R)| 4.071| 0.355| 1.858|
io_pci_ad<13>| 1.994(R)| -0.373(R)| 4.056| 0.373| 1.842|
io_pci_ad<14>| 1.979(R)| -0.355(R)| 4.071| 0.355| 1.858|
io_pci_ad<15>| 1.996(R)| -0.375(R)| 4.054| 0.375| 1.840|
io_pci_ad<16>| 2.027(R)| -0.411(R)| 4.023| 0.411| 1.806|
io_pci_ad<17>| 2.021(R)| -0.404(R)| 4.029| 0.404| 1.813|
io_pci_ad<18>| 1.958(R)| -0.330(R)| 4.092| 0.330| 1.881|
io_pci_ad<19>| 1.968(R)| -0.342(R)| 4.082| 0.342| 1.870|
io_pci_ad<20>| 2.006(R)| -0.386(R)| 4.044| 0.386| 1.829|
io_pci_ad<21>| 2.006(R)| -0.386(R)| 4.044| 0.386| 1.829|
io_pci_ad<22>| 1.958(R)| -0.330(R)| 4.092| 0.330| 1.881|
io_pci_ad<23>| 1.968(R)| -0.342(R)| 4.082| 0.342| 1.870|
io_pci_ad<24>| 2.040(R)| -0.426(R)| 4.010| 0.426| 1.792|
io_pci_ad<25>| 1.951(R)| -0.322(R)| 4.099| 0.322| 1.889|
io_pci_ad<26>| 1.953(R)| -0.324(R)| 4.097| 0.324| 1.887|
io_pci_ad<27>| 1.872(R)| -0.229(R)| 4.178| 0.229| 1.975|
io_pci_ad<28>| 2.041(R)| -0.428(R)| 4.009| 0.428| 1.791|
io_pci_ad<29>| 1.872(R)| -0.229(R)| 4.178| 0.229| 1.975|
io_pci_ad<30>| 2.041(R)| -0.428(R)| 4.009| 0.428| 1.791|
io_pci_ad<31>| 2.028(R)| -0.412(R)| 4.022| 0.412| 1.805|
io_pci_cbe<0>| 5.475(R)| -0.385(R)| 0.575| 0.385| 0.095|
io_pci_cbe<1>| 5.341(R)| -0.349(R)| 0.709| 0.349| 0.180|
io_pci_cbe<2>| 5.034(R)| -0.379(R)| 1.016| 0.379| 0.319|
io_pci_cbe<3>| 5.601(R)| -0.322(R)| 0.449| 0.322| 0.064|
io_pci_devsel| 5.580(R)| -1.041(R)| 0.470| 1.041| -0.285|
io_pci_frame | 5.925(R)| -0.179(R)| 0.125| 0.179| -0.027|
io_pci_irdy | 5.989(R)| -0.345(R)| 0.061| 0.345| -0.142|
io_pci_stop | 5.386(R)| -0.478(R)| 0.664| 0.478| 0.093|
io_pci_trdy | 6.040(R)| -0.764(R)| 0.010| 0.764| -0.377|
-------------+------------+------------+---------+---------+-------------+
Worst Case | | | | | |
Summary | 6.040| -0.179| 0.010| 0.179| |
-------------+------------+------------+---------+---------+-------------+
TIMEGRP "pci_in_10" OFFSET = IN 9 ns VALID 9 ns BEFORE COMP "in_pci_clock";
Worst Case Data Window 5.832; Ideal Clock Offset To Actual Clock -0.870;
------------+------------+------------+---------+---------+-------------+
| | | Setup | Hold |Source Offset|
Source | Setup | Hold | Slack | Slack | To Center |
------------+------------+------------+---------+---------+-------------+
in_pci_gnt | 6.546(R)| -0.714(R)| 2.454| 0.714| 0.870|
------------+------------+------------+---------+---------+-------------+
Worst Case | | | | | |
Summary | 6.546| -0.714| 2.454| 0.714| |
------------+------------+------------+---------+---------+-------------+
TIMEGRP "video_in" OFFSET = IN 1.37 ns VALID 4.24 ns BEFORE COMP "in_video_clock" TIMEGRP video_rising;
Worst Case Data Window 1.604; Ideal Clock Offset To Actual Clock -0.123;
-------------------+------------+------------+---------+---------+-------------+
| | | Setup | Hold |Source Offset|
Source | Setup | Hold | Slack | Slack | To Center |
-------------------+------------+------------+---------+---------+-------------+
in_video_data<0> | -0.133(R)| 1.675(R)| 1.503| 1.195| 0.154|
in_video_data<1> | -0.123(R)| 1.664(R)| 1.493| 1.206| 0.144|
in_video_data<2> | -0.104(R)| 1.641(R)| 1.474| 1.229| 0.122|
in_video_data<3> | -0.091(R)| 1.626(R)| 1.461| 1.244| 0.109|
in_video_data<4> | -0.091(R)| 1.626(R)| 1.461| 1.244| 0.109|
in_video_data<5> | -0.091(R)| 1.626(R)| 1.461| 1.244| 0.109|
in_video_data<6> | -0.114(R)| 1.653(R)| 1.484| 1.217| 0.133|
in_video_data<7> | -0.123(R)| 1.664(R)| 1.493| 1.206| 0.144|
in_video_data<8> | -0.087(R)| 1.621(R)| 1.457| 1.249| 0.104|
in_video_data<9> | -0.087(R)| 1.621(R)| 1.457| 1.249| 0.104|
in_video_data<10> | -0.082(R)| 1.615(R)| 1.452| 1.255| 0.099|
in_video_data<11> | -0.082(R)| 1.615(R)| 1.452| 1.255| 0.099|
in_video_data<12> | -0.133(R)| 1.675(R)| 1.503| 1.195| 0.154|
in_video_data<13> | -0.112(R)| 1.651(R)| 1.482| 1.219| 0.131|
in_video_data<14> | -0.122(R)| 1.663(R)| 1.492| 1.207| 0.142|
in_video_horizontal| -0.071(R)| 1.603(R)| 1.441| 1.267| 0.087|
-------------------+------------+------------+---------+---------+-------------+
Worst Case | | | | | |
Summary | -0.071| 1.675| 1.441| 1.195| |
-------------------+------------+------------+---------+---------+-------------+
TIMEGRP "video_in" OFFSET = IN -5.37 ns VALID 4.24 ns BEFORE COMP "in_video_clock" TIMEGRP video_falling;
Worst Case Data Window 1.593; Ideal Clock Offset To Actual Clock -0.128;
-----------------+------------+------------+---------+---------+-------------+
| | | Setup | Hold |Source Offset|
Source | Setup | Hold | Slack | Slack | To Center |
-----------------+------------+------------+---------+---------+-------------+
in_video_data<0> | -6.873(F)| 8.415(F)| 1.503| 1.195| 0.154|
in_video_data<1> | -6.863(F)| 8.404(F)| 1.493| 1.206| 0.144|
in_video_data<2> | -6.844(F)| 8.381(F)| 1.474| 1.229| 0.122|
in_video_data<3> | -6.831(F)| 8.366(F)| 1.461| 1.244| 0.109|
in_video_data<4> | -6.831(F)| 8.366(F)| 1.461| 1.244| 0.109|
in_video_data<5> | -6.831(F)| 8.366(F)| 1.461| 1.244| 0.109|
in_video_data<6> | -6.854(F)| 8.393(F)| 1.484| 1.217| 0.133|
in_video_data<7> | -6.863(F)| 8.404(F)| 1.493| 1.206| 0.144|
in_video_data<8> | -6.827(F)| 8.361(F)| 1.457| 1.249| 0.104|
in_video_data<9> | -6.827(F)| 8.361(F)| 1.457| 1.249| 0.104|
in_video_data<10>| -6.822(F)| 8.355(F)| 1.452| 1.255| 0.099|
in_video_data<11>| -6.822(F)| 8.355(F)| 1.452| 1.255| 0.099|
in_video_data<12>| -6.873(F)| 8.415(F)| 1.503| 1.195| 0.154|
in_video_data<13>| -6.852(F)| 8.391(F)| 1.482| 1.219| 0.131|
in_video_data<14>| -6.862(F)| 8.403(F)| 1.492| 1.207| 0.142|
-----------------+------------+------------+---------+---------+-------------+
Worst Case | | | | | |
Summary | -6.822| 8.415| 1.452| 1.195| |
-----------------+------------+------------+---------+---------+-------------+
TIMEGRP "pci_out_11" OFFSET = OUT 10 ns AFTER COMP "in_pci_clock";
Largest slack: 2.285 ns; Smallest slack: 0.259 ns; Relative Skew: 2.026 ns;
-----------------------------------------------+-------------+-------------+
PAD | Slack |Relative Skew|
-----------------------------------------------+-------------+-------------+
io_pci_ad<0> | 1.364| 0.921|
io_pci_ad<1> | 0.605| 1.680|
io_pci_ad<2> | 1.350| 0.935|
io_pci_ad<3> | 1.084| 1.201|
io_pci_ad<4> | 1.347| 0.938|
io_pci_ad<5> | 1.346| 0.939|
io_pci_ad<6> | 0.528| 1.757|
io_pci_ad<7> | 1.383| 0.902|
io_pci_ad<8> | 1.073| 1.212|
io_pci_ad<9> | 1.347| 0.938|
io_pci_ad<10> | 1.476| 0.809|
io_pci_ad<11> | 2.032| 0.253|
io_pci_ad<12> | 2.034| 0.251|
io_pci_ad<13> | 1.078| 1.207|
io_pci_ad<14> | 1.763| 0.522|
io_pci_ad<15> | 1.489| 0.796|
io_pci_ad<16> | 1.767| 0.518|
io_pci_ad<17> | 1.936| 0.349|
io_pci_ad<18> | 1.465| 0.820|
io_pci_ad<19> | 1.529| 0.756|
io_pci_ad<20> | 1.508| 0.777|
io_pci_ad<21> | 1.619| 0.666|
io_pci_ad<22> | 1.328| 0.957|
io_pci_ad<23> | 1.415| 0.870|
io_pci_ad<24> | 1.412| 0.873|
io_pci_ad<25> | 1.267| 1.018|
io_pci_ad<26> | 1.588| 0.697|
io_pci_ad<27> | 1.437| 0.848|
io_pci_ad<28> | 1.535| 0.750|
io_pci_ad<29> | 0.259| 2.026|
io_pci_ad<30> | 1.836| 0.449|
io_pci_ad<31> | 1.321| 0.964|
io_pci_cbe<0> | 1.965| 0.320|
io_pci_cbe<1> | 1.483| 0.802|
io_pci_cbe<2> | 2.241| 0.044|
io_pci_cbe<3> | 1.906| 0.379|
io_pci_devsel | 1.744| 0.541|
io_pci_frame | 2.285| 0.000|
io_pci_irdy | 1.859| 0.426|
io_pci_stop | 2.152| 0.133|
io_pci_trdy | 1.821| 0.464|
out_pci_par | 1.613| 0.672|
-----------------------------------------------+-------------+-------------+
TIMEGRP "pci_out_12" OFFSET = OUT 11 ns AFTER COMP "in_pci_clock";
Largest slack: 2.973 ns; Smallest slack: 2.973 ns; Relative Skew: 0.000 ns;
-----------------------------------------------+-------------+-------------+
PAD | Slack |Relative Skew|
-----------------------------------------------+-------------+-------------+
out_pci_req | 2.973| 0.000|
-----------------------------------------------+-------------+-------------+
Timing summary:
---------------
Timing errors: 0 Score: 0
Constraints cover 189133 paths, 0 nets, and 10686 connections
Design statistics:
Minimum period: 18.578ns (Maximum frequency: 53.827MHz)
Minimum input required time before clock: 6.546ns
Minimum output required time after clock: 9.741ns
Analysis completed THU 6 MAR 13:30:7 2008
--------------------------------------------------------------------------------
Trace Settings:
-------------------------
Trace Settings
Peak Memory Usage: 148 MB