トップPVスタティック タイミング レポート

PV4 リリース番号: 01

PCI のセットアップと出力遅延は、規格より 1ns 厳しい制約条件にしました。

--------------------------------------------------------------------------------
Release 9.1.03i Trace 
Copyright (c) 1995-2007 Xilinx, Inc.  All rights reserved.

K:\ISE\bin\nt\trce.exe -ise E:/RTL/_/PV.ise -intstyle ise -e 3 -s 4 -xml PV
PV.ncd -o PV.twr PV.pcf -ucf E:/RTL/Code/UCF/PV.ucf

Design file:              pv.ncd
Physical constraint file: pv.pcf
Device,package,speed:     xc3s200a,ft256,-4 (ADVANCED 1.34 2007-03-08)
Report level:             error report

Environment Variable      Effect 
--------------------      ------ 
NONE                      No environment variables were set
--------------------------------------------------------------------------------

INFO:Timing:2752 - To get complete path coverage, use the unconstrained paths 
   option. All paths that are not constrained will be reported in the 
   unconstrained paths section(s) of the report.
INFO:Timing:3339 - The clock-to-out numbers in this timing report are based on 
   a 50 Ohm transmission line loading model.  For the details of this model, 
   and for more information on accounting for different loading conditions, 
   please see the device datasheet.

================================================================================
Timing constraint: TS_pci_clock = PERIOD TIMEGRP "pci_clock" 30 ns HIGH 50%;

 32218 items analyzed, 0 timing errors detected. (0 setup errors, 0 hold errors)
 Minimum period is  17.001ns.
--------------------------------------------------------------------------------

================================================================================
Timing constraint: TS_video_clock = PERIOD TIMEGRP "video_clock" 13.48 ns HIGH 
50%;

 39107 items analyzed, 0 timing errors detected. (0 setup errors, 0 hold errors)
 Minimum period is  11.493ns.
--------------------------------------------------------------------------------

================================================================================
Timing constraint: TS_clock_pci_rx_clock = PERIOD TIMEGRP "clock_pci_rx_clock" 
TS_pci_clock * 2         HIGH 50%;

 13131 items analyzed, 0 timing errors detected. (0 setup errors, 0 hold errors)
 Minimum period is  14.256ns.
--------------------------------------------------------------------------------

================================================================================
Timing constraint: TS_clock_pci_ram_clock = PERIOD TIMEGRP 
"clock_pci_ram_clock" TS_pci_clock / 3         HIGH 50%;

 5730 items analyzed, 0 timing errors detected. (0 setup errors, 0 hold errors)
 Minimum period is   9.176ns.
--------------------------------------------------------------------------------

================================================================================
Timing constraint: TIMEGRP "pci_in_7" OFFSET = IN 6 ns VALID 6 ns BEFORE COMP 
"in_pci_clock";

 284 items analyzed, 0 timing errors detected. (0 setup errors, 0 hold errors)
 Minimum allowable offset is   5.996ns.
--------------------------------------------------------------------------------

================================================================================
Timing constraint: TIMEGRP "pci_in_10" OFFSET = IN 9 ns VALID 9 ns BEFORE COMP 
"in_pci_clock";

 7 items analyzed, 0 timing errors detected. (0 setup errors, 0 hold errors)
 Minimum allowable offset is   5.410ns.
--------------------------------------------------------------------------------

================================================================================
Timing constraint: TIMEGRP "pci_out_11" OFFSET = OUT 10 ns AFTER COMP 
"in_pci_clock";

 84 items analyzed, 0 timing errors detected.
 Minimum allowable offset is   9.834ns.
--------------------------------------------------------------------------------

================================================================================
Timing constraint: TIMEGRP "pci_out_12" OFFSET = OUT 11 ns AFTER COMP 
"in_pci_clock";

 2 items analyzed, 0 timing errors detected.
 Minimum allowable offset is   7.054ns.
--------------------------------------------------------------------------------

================================================================================
Timing constraint: TIMEGRP "video_in" OFFSET = IN 1.37 ns VALID 4.24 ns BEFORE 
COMP         "in_video_clock" TIMEGRP video_rising;

 16 items analyzed, 0 timing errors detected. (0 setup errors, 0 hold errors)
 Offset is  -0.099ns.
--------------------------------------------------------------------------------

================================================================================
Timing constraint: TIMEGRP "video_in" OFFSET = IN -5.37 ns VALID 4.24 ns BEFORE 
COMP         "in_video_clock" TIMEGRP video_falling;

 15 items analyzed, 0 timing errors detected. (0 setup errors, 0 hold errors)
 Offset is  -6.850ns.
--------------------------------------------------------------------------------

================================================================================
Timing constraint: TIMEGRP "ram_in" OFFSET = IN 8 ns VALID 16 ns BEFORE COMP 
"in_pci_clock";

 32 items analyzed, 0 timing errors detected. (0 setup errors, 0 hold errors)
 Minimum allowable offset is   2.008ns.
--------------------------------------------------------------------------------

================================================================================
Timing constraint: TIMEGRP "ram_out" OFFSET = OUT 15 ns AFTER COMP 
"in_pci_clock";

 80 items analyzed, 0 timing errors detected.
 Minimum allowable offset is  13.120ns.
--------------------------------------------------------------------------------


All constraints were met.


Data Sheet report:
-----------------
All values displayed in nanoseconds (ns)

Setup/Hold to clock in_pci_clock
---------------+------------+------------+------------------+--------+
               |  Setup to  |  Hold to   |                  | Clock  |
Source         | clk (edge) | clk (edge) |Internal Clock(s) | Phase  |
---------------+------------+------------+------------------+--------+
in_pci_gnt     |    5.410(R)|   -1.326(R)|clock_pci         |   0.000|
in_pci_idsel   |    1.952(R)|   -0.572(R)|clock_pci         |   0.000|
io_pci_ad<0>   |    2.050(R)|   -0.688(R)|clock_pci         |   0.000|
io_pci_ad<1>   |    2.053(R)|   -0.692(R)|clock_pci         |   0.000|
io_pci_ad<2>   |    2.050(R)|   -0.688(R)|clock_pci         |   0.000|
io_pci_ad<3>   |    2.053(R)|   -0.692(R)|clock_pci         |   0.000|
io_pci_ad<4>   |    2.086(R)|   -0.731(R)|clock_pci         |   0.000|
io_pci_ad<5>   |    2.060(R)|   -0.699(R)|clock_pci         |   0.000|
io_pci_ad<6>   |    2.086(R)|   -0.731(R)|clock_pci         |   0.000|
io_pci_ad<7>   |    2.060(R)|   -0.699(R)|clock_pci         |   0.000|
io_pci_ad<8>   |    2.079(R)|   -0.722(R)|clock_pci         |   0.000|
io_pci_ad<9>   |    2.075(R)|   -0.718(R)|clock_pci         |   0.000|
io_pci_ad<10>  |    2.079(R)|   -0.722(R)|clock_pci         |   0.000|
io_pci_ad<11>  |    2.052(R)|   -0.690(R)|clock_pci         |   0.000|
io_pci_ad<12>  |    2.055(R)|   -0.694(R)|clock_pci         |   0.000|
io_pci_ad<13>  |    2.067(R)|   -0.708(R)|clock_pci         |   0.000|
io_pci_ad<14>  |    2.055(R)|   -0.694(R)|clock_pci         |   0.000|
io_pci_ad<15>  |    2.073(R)|   -0.716(R)|clock_pci         |   0.000|
io_pci_ad<16>  |    2.097(R)|   -0.744(R)|clock_pci         |   0.000|
io_pci_ad<17>  |    2.093(R)|   -0.739(R)|clock_pci         |   0.000|
io_pci_ad<18>  |    2.046(R)|   -0.683(R)|clock_pci         |   0.000|
io_pci_ad<19>  |    2.052(R)|   -0.691(R)|clock_pci         |   0.000|
io_pci_ad<20>  |    2.081(R)|   -0.725(R)|clock_pci         |   0.000|
io_pci_ad<21>  |    2.081(R)|   -0.725(R)|clock_pci         |   0.000|
io_pci_ad<22>  |    2.046(R)|   -0.683(R)|clock_pci         |   0.000|
io_pci_ad<23>  |    2.052(R)|   -0.691(R)|clock_pci         |   0.000|
io_pci_ad<24>  |    2.109(R)|   -0.757(R)|clock_pci         |   0.000|
io_pci_ad<25>  |    2.042(R)|   -0.679(R)|clock_pci         |   0.000|
io_pci_ad<26>  |    2.054(R)|   -0.693(R)|clock_pci         |   0.000|
io_pci_ad<27>  |    1.995(R)|   -0.623(R)|clock_pci         |   0.000|
io_pci_ad<28>  |    2.110(R)|   -0.759(R)|clock_pci         |   0.000|
io_pci_ad<29>  |    1.995(R)|   -0.623(R)|clock_pci         |   0.000|
io_pci_ad<30>  |    2.110(R)|   -0.759(R)|clock_pci         |   0.000|
io_pci_ad<31>  |    2.086(R)|   -0.731(R)|clock_pci         |   0.000|
io_pci_cbe<0>  |    2.075(R)|   -0.718(R)|clock_pci         |   0.000|
io_pci_cbe<1>  |    2.052(R)|   -0.690(R)|clock_pci         |   0.000|
io_pci_cbe<2>  |    2.076(R)|   -0.719(R)|clock_pci         |   0.000|
io_pci_cbe<3>  |    2.042(R)|   -0.679(R)|clock_pci         |   0.000|
io_pci_devsel  |    4.166(R)|   -0.195(R)|clock_pci         |   0.000|
io_pci_frame   |    4.544(R)|   -0.217(R)|clock_pci         |   0.000|
io_pci_irdy    |    2.939(R)|   -0.070(R)|clock_pci         |   0.000|
io_pci_stop    |    3.983(R)|   -0.873(R)|clock_pci         |   0.000|
io_pci_trdy    |    5.996(R)|   -0.757(R)|clock_pci         |   0.000|
io_ram_data<0> |    1.932(R)|    0.733(R)|clock_ram         |   0.000|
io_ram_data<1> |    1.979(R)|    0.677(R)|clock_ram         |   0.000|
io_ram_data<2> |    1.979(R)|    0.677(R)|clock_ram         |   0.000|
io_ram_data<3> |    1.967(R)|    0.691(R)|clock_ram         |   0.000|
io_ram_data<4> |    1.950(R)|    0.712(R)|clock_ram         |   0.000|
io_ram_data<5> |    1.909(R)|    0.759(R)|clock_ram         |   0.000|
io_ram_data<6> |    1.909(R)|    0.759(R)|clock_ram         |   0.000|
io_ram_data<7> |    1.918(R)|    0.748(R)|clock_ram         |   0.000|
io_ram_data<8> |    1.991(R)|    0.663(R)|clock_ram         |   0.000|
io_ram_data<9> |    1.996(R)|    0.657(R)|clock_ram         |   0.000|
io_ram_data<10>|    1.990(R)|    0.664(R)|clock_ram         |   0.000|
io_ram_data<11>|    1.995(R)|    0.658(R)|clock_ram         |   0.000|
io_ram_data<12>|    1.995(R)|    0.658(R)|clock_ram         |   0.000|
io_ram_data<13>|    1.924(R)|    0.742(R)|clock_ram         |   0.000|
io_ram_data<14>|    1.924(R)|    0.742(R)|clock_ram         |   0.000|
io_ram_data<15>|    1.932(R)|    0.733(R)|clock_ram         |   0.000|
io_ram_data<16>|    1.918(R)|    0.748(R)|clock_ram         |   0.000|
io_ram_data<17>|    1.977(R)|    0.679(R)|clock_ram         |   0.000|
io_ram_data<18>|    1.977(R)|    0.679(R)|clock_ram         |   0.000|
io_ram_data<19>|    1.957(R)|    0.702(R)|clock_ram         |   0.000|
io_ram_data<20>|    1.957(R)|    0.702(R)|clock_ram         |   0.000|
io_ram_data<21>|    1.944(R)|    0.718(R)|clock_ram         |   0.000|
io_ram_data<22>|    1.944(R)|    0.718(R)|clock_ram         |   0.000|
io_ram_data<23>|    1.982(R)|    0.673(R)|clock_ram         |   0.000|
io_ram_data<24>|    1.987(R)|    0.667(R)|clock_ram         |   0.000|
io_ram_data<25>|    2.008(R)|    0.643(R)|clock_ram         |   0.000|
io_ram_data<26>|    2.008(R)|    0.643(R)|clock_ram         |   0.000|
io_ram_data<27>|    1.957(R)|    0.702(R)|clock_ram         |   0.000|
io_ram_data<28>|    1.957(R)|    0.702(R)|clock_ram         |   0.000|
io_ram_data<29>|    1.957(R)|    0.702(R)|clock_ram         |   0.000|
io_ram_data<30>|    1.960(R)|    0.699(R)|clock_ram         |   0.000|
io_ram_data<31>|    1.960(R)|    0.699(R)|clock_ram         |   0.000|
---------------+------------+------------+------------------+--------+

Setup/Hold to clock in_video_clock
-------------------+------------+------------+------------------+--------+
                   |  Setup to  |  Hold to   |                  | Clock  |
Source             | clk (edge) | clk (edge) |Internal Clock(s) | Phase  |
-------------------+------------+------------+------------------+--------+
in_video_data<0>   |   -0.147(R)|    1.441(R)|clock_video       |   0.000|
                   |   -6.887(F)|    8.181(F)|clock_video       |   6.740|
in_video_data<1>   |   -0.163(R)|    1.459(R)|clock_video       |   0.000|
                   |   -6.903(F)|    8.199(F)|clock_video       |   6.740|
in_video_data<2>   |   -0.132(R)|    1.423(R)|clock_video       |   0.000|
                   |   -6.872(F)|    8.163(F)|clock_video       |   6.740|
in_video_data<3>   |   -0.119(R)|    1.408(R)|clock_video       |   0.000|
                   |   -6.859(F)|    8.148(F)|clock_video       |   6.740|
in_video_data<4>   |   -0.119(R)|    1.408(R)|clock_video       |   0.000|
                   |   -6.859(F)|    8.148(F)|clock_video       |   6.740|
in_video_data<5>   |   -0.117(R)|    1.406(R)|clock_video       |   0.000|
                   |   -6.857(F)|    8.146(F)|clock_video       |   6.740|
in_video_data<6>   |   -0.157(R)|    1.453(R)|clock_video       |   0.000|
                   |   -6.897(F)|    8.193(F)|clock_video       |   6.740|
in_video_data<7>   |   -0.163(R)|    1.459(R)|clock_video       |   0.000|
                   |   -6.903(F)|    8.199(F)|clock_video       |   6.740|
in_video_data<8>   |   -0.115(R)|    1.403(R)|clock_video       |   0.000|
                   |   -6.855(F)|    8.143(F)|clock_video       |   6.740|
in_video_data<9>   |   -0.115(R)|    1.403(R)|clock_video       |   0.000|
                   |   -6.855(F)|    8.143(F)|clock_video       |   6.740|
in_video_data<10>  |   -0.110(R)|    1.397(R)|clock_video       |   0.000|
                   |   -6.850(F)|    8.137(F)|clock_video       |   6.740|
in_video_data<11>  |   -0.110(R)|    1.397(R)|clock_video       |   0.000|
                   |   -6.850(F)|    8.137(F)|clock_video       |   6.740|
in_video_data<12>  |   -0.147(R)|    1.441(R)|clock_video       |   0.000|
                   |   -6.887(F)|    8.181(F)|clock_video       |   6.740|
in_video_data<13>  |   -0.124(R)|    1.414(R)|clock_video       |   0.000|
                   |   -6.864(F)|    8.154(F)|clock_video       |   6.740|
in_video_data<14>  |   -0.149(R)|    1.443(R)|clock_video       |   0.000|
                   |   -6.889(F)|    8.183(F)|clock_video       |   6.740|
in_video_horizontal|   -0.099(R)|    1.385(R)|clock_video       |   0.000|
-------------------+------------+------------+------------------+--------+

Clock in_pci_clock to Pad
--------------------+------------+------------------+--------+
                    | clk (edge) |                  | Clock  |
Destination         |   to PAD   |Internal Clock(s) | Phase  |
--------------------+------------+------------------+--------+
io_pci_ad<0>        |    9.474(R)|clock_pci         |   0.000|
io_pci_ad<1>        |    9.758(R)|clock_pci         |   0.000|
io_pci_ad<2>        |    8.478(R)|clock_pci         |   0.000|
io_pci_ad<3>        |    8.606(R)|clock_pci         |   0.000|
io_pci_ad<4>        |    8.545(R)|clock_pci         |   0.000|
io_pci_ad<5>        |    8.458(R)|clock_pci         |   0.000|
io_pci_ad<6>        |    8.451(R)|clock_pci         |   0.000|
io_pci_ad<7>        |    9.758(R)|clock_pci         |   0.000|
io_pci_ad<8>        |    8.103(R)|clock_pci         |   0.000|
io_pci_ad<9>        |    7.828(R)|clock_pci         |   0.000|
io_pci_ad<10>       |    8.377(R)|clock_pci         |   0.000|
io_pci_ad<11>       |    7.908(R)|clock_pci         |   0.000|
io_pci_ad<12>       |    7.527(R)|clock_pci         |   0.000|
io_pci_ad<13>       |    8.097(R)|clock_pci         |   0.000|
io_pci_ad<14>       |    7.398(R)|clock_pci         |   0.000|
io_pci_ad<15>       |    7.659(R)|clock_pci         |   0.000|
io_pci_ad<16>       |    8.350(R)|clock_pci         |   0.000|
io_pci_ad<17>       |    8.619(R)|clock_pci         |   0.000|
io_pci_ad<18>       |    8.702(R)|clock_pci         |   0.000|
io_pci_ad<19>       |    8.277(R)|clock_pci         |   0.000|
io_pci_ad<20>       |    9.807(R)|clock_pci         |   0.000|
io_pci_ad<21>       |    9.799(R)|clock_pci         |   0.000|
io_pci_ad<22>       |    9.819(R)|clock_pci         |   0.000|
io_pci_ad<23>       |    8.288(R)|clock_pci         |   0.000|
io_pci_ad<24>       |    9.828(R)|clock_pci         |   0.000|
io_pci_ad<25>       |    9.821(R)|clock_pci         |   0.000|
io_pci_ad<26>       |    8.854(R)|clock_pci         |   0.000|
io_pci_ad<27>       |    9.807(R)|clock_pci         |   0.000|
io_pci_ad<28>       |    9.834(R)|clock_pci         |   0.000|
io_pci_ad<29>       |    9.802(R)|clock_pci         |   0.000|
io_pci_ad<30>       |    8.555(R)|clock_pci         |   0.000|
io_pci_ad<31>       |    9.819(R)|clock_pci         |   0.000|
io_pci_cbe<0>       |    7.077(R)|clock_pci         |   0.000|
io_pci_cbe<1>       |    7.653(R)|clock_pci         |   0.000|
io_pci_cbe<2>       |    7.905(R)|clock_pci         |   0.000|
io_pci_cbe<3>       |    9.768(R)|clock_pci         |   0.000|
io_pci_devsel       |    7.713(R)|clock_pci         |   0.000|
io_pci_frame        |    8.248(R)|clock_pci         |   0.000|
io_pci_irdy         |    7.933(R)|clock_pci         |   0.000|
io_pci_stop         |    8.462(R)|clock_pci         |   0.000|
io_pci_trdy         |    8.182(R)|clock_pci         |   0.000|
io_ram_data<0>      |   10.781(R)|clock_ram         |   0.000|
io_ram_data<1>      |    9.761(R)|clock_ram         |   0.000|
io_ram_data<2>      |    9.182(R)|clock_ram         |   0.000|
io_ram_data<3>      |   10.022(R)|clock_ram         |   0.000|
io_ram_data<4>      |   10.293(R)|clock_ram         |   0.000|
io_ram_data<5>      |   10.342(R)|clock_ram         |   0.000|
io_ram_data<6>      |   10.264(R)|clock_ram         |   0.000|
io_ram_data<7>      |   10.533(R)|clock_ram         |   0.000|
io_ram_data<8>      |   11.142(R)|clock_ram         |   0.000|
io_ram_data<9>      |   10.774(R)|clock_ram         |   0.000|
io_ram_data<10>     |   10.469(R)|clock_ram         |   0.000|
io_ram_data<11>     |   10.357(R)|clock_ram         |   0.000|
io_ram_data<12>     |   10.740(R)|clock_ram         |   0.000|
io_ram_data<13>     |   10.631(R)|clock_ram         |   0.000|
io_ram_data<14>     |   10.486(R)|clock_ram         |   0.000|
io_ram_data<15>     |   10.893(R)|clock_ram         |   0.000|
io_ram_data<16>     |   10.611(R)|clock_ram         |   0.000|
io_ram_data<17>     |   10.604(R)|clock_ram         |   0.000|
io_ram_data<18>     |   10.646(R)|clock_ram         |   0.000|
io_ram_data<19>     |   10.972(R)|clock_ram         |   0.000|
io_ram_data<20>     |   10.696(R)|clock_ram         |   0.000|
io_ram_data<21>     |   10.972(R)|clock_ram         |   0.000|
io_ram_data<22>     |   10.696(R)|clock_ram         |   0.000|
io_ram_data<23>     |    9.735(R)|clock_ram         |   0.000|
io_ram_data<24>     |   13.120(R)|clock_ram         |   0.000|
io_ram_data<25>     |   12.577(R)|clock_ram         |   0.000|
io_ram_data<26>     |   12.587(R)|clock_ram         |   0.000|
io_ram_data<27>     |   12.103(R)|clock_ram         |   0.000|
io_ram_data<28>     |   12.300(R)|clock_ram         |   0.000|
io_ram_data<29>     |   12.006(R)|clock_ram         |   0.000|
io_ram_data<30>     |   11.706(R)|clock_ram         |   0.000|
io_ram_data<31>     |   11.035(R)|clock_ram         |   0.000|
out_pci_par         |    7.781(R)|clock_pci         |   0.000|
out_pci_req         |    7.054(R)|clock_pci         |   0.000|
out_ram_address<0>  |    8.550(R)|clock_ram         |   0.000|
out_ram_address<1>  |    8.521(R)|clock_ram         |   0.000|
out_ram_address<2>  |    8.532(R)|clock_ram         |   0.000|
out_ram_address<3>  |    8.604(R)|clock_ram         |   0.000|
out_ram_address<4>  |    8.534(R)|clock_ram         |   0.000|
out_ram_address<5>  |    8.534(R)|clock_ram         |   0.000|
out_ram_address<6>  |    8.494(R)|clock_ram         |   0.000|
out_ram_address<7>  |    8.523(R)|clock_ram         |   0.000|
out_ram_address<8>  |    8.510(R)|clock_ram         |   0.000|
out_ram_address<9>  |    8.524(R)|clock_ram         |   0.000|
out_ram_address<10> |    8.521(R)|clock_ram         |   0.000|
out_ram_bank<0>     |    8.565(R)|clock_ram         |   0.000|
out_ram_bank<1>     |    8.571(R)|clock_ram         |   0.000|
out_ram_col_address |    8.623(R)|clock_ram         |   0.000|
out_ram_row_address |    8.623(R)|clock_ram         |   0.000|
out_ram_write_enable|    8.553(R)|clock_ram         |   0.000|
--------------------+------------+------------------+--------+

Clock to Setup on destination clock in_pci_clock
---------------+---------+---------+---------+---------+
               | Src:Rise| Src:Fall| Src:Rise| Src:Fall|
Source Clock   |Dest:Rise|Dest:Rise|Dest:Fall|Dest:Fall|
---------------+---------+---------+---------+---------+
in_pci_clock   |   13.607|         |         |         |
---------------+---------+---------+---------+---------+

Clock to Setup on destination clock in_video_clock
---------------+---------+---------+---------+---------+
               | Src:Rise| Src:Fall| Src:Rise| Src:Fall|
Source Clock   |Dest:Rise|Dest:Rise|Dest:Fall|Dest:Fall|
---------------+---------+---------+---------+---------+
in_video_clock |   11.493|    3.878|         |    2.637|
---------------+---------+---------+---------+---------+

TIMEGRP "pci_in_7" OFFSET = IN 6 ns VALID 6 ns BEFORE COMP "in_pci_clock";
Worst Case Data Window 5.926; Ideal Clock Offset To Actual Clock 0.033; 
-------------+------------+------------+---------+---------+-------------+
             |            |            |  Setup  |  Hold   |Source Offset|
Source       |   Setup    |    Hold    |  Slack  |  Slack  |  To Center  |
-------------+------------+------------+---------+---------+-------------+
in_pci_idsel |    1.952(R)|   -0.572(R)|    4.048|    0.572|        1.738|
io_pci_ad<0> |    2.050(R)|   -0.688(R)|    3.950|    0.688|        1.631|
io_pci_ad<1> |    2.053(R)|   -0.692(R)|    3.947|    0.692|        1.628|
io_pci_ad<2> |    2.050(R)|   -0.688(R)|    3.950|    0.688|        1.631|
io_pci_ad<3> |    2.053(R)|   -0.692(R)|    3.947|    0.692|        1.628|
io_pci_ad<4> |    2.086(R)|   -0.731(R)|    3.914|    0.731|        1.592|
io_pci_ad<5> |    2.060(R)|   -0.699(R)|    3.940|    0.699|        1.621|
io_pci_ad<6> |    2.086(R)|   -0.731(R)|    3.914|    0.731|        1.592|
io_pci_ad<7> |    2.060(R)|   -0.699(R)|    3.940|    0.699|        1.621|
io_pci_ad<8> |    2.079(R)|   -0.722(R)|    3.921|    0.722|        1.600|
io_pci_ad<9> |    2.075(R)|   -0.718(R)|    3.925|    0.718|        1.604|
io_pci_ad<10>|    2.079(R)|   -0.722(R)|    3.921|    0.722|        1.600|
io_pci_ad<11>|    2.052(R)|   -0.690(R)|    3.948|    0.690|        1.629|
io_pci_ad<12>|    2.055(R)|   -0.694(R)|    3.945|    0.694|        1.626|
io_pci_ad<13>|    2.067(R)|   -0.708(R)|    3.933|    0.708|        1.612|
io_pci_ad<14>|    2.055(R)|   -0.694(R)|    3.945|    0.694|        1.626|
io_pci_ad<15>|    2.073(R)|   -0.716(R)|    3.927|    0.716|        1.606|
io_pci_ad<16>|    2.097(R)|   -0.744(R)|    3.903|    0.744|        1.579|
io_pci_ad<17>|    2.093(R)|   -0.739(R)|    3.907|    0.739|        1.584|
io_pci_ad<18>|    2.046(R)|   -0.683(R)|    3.954|    0.683|        1.636|
io_pci_ad<19>|    2.052(R)|   -0.691(R)|    3.948|    0.691|        1.629|
io_pci_ad<20>|    2.081(R)|   -0.725(R)|    3.919|    0.725|        1.597|
io_pci_ad<21>|    2.081(R)|   -0.725(R)|    3.919|    0.725|        1.597|
io_pci_ad<22>|    2.046(R)|   -0.683(R)|    3.954|    0.683|        1.636|
io_pci_ad<23>|    2.052(R)|   -0.691(R)|    3.948|    0.691|        1.629|
io_pci_ad<24>|    2.109(R)|   -0.757(R)|    3.891|    0.757|        1.567|
io_pci_ad<25>|    2.042(R)|   -0.679(R)|    3.958|    0.679|        1.640|
io_pci_ad<26>|    2.054(R)|   -0.693(R)|    3.946|    0.693|        1.627|
io_pci_ad<27>|    1.995(R)|   -0.623(R)|    4.005|    0.623|        1.691|
io_pci_ad<28>|    2.110(R)|   -0.759(R)|    3.890|    0.759|        1.566|
io_pci_ad<29>|    1.995(R)|   -0.623(R)|    4.005|    0.623|        1.691|
io_pci_ad<30>|    2.110(R)|   -0.759(R)|    3.890|    0.759|        1.566|
io_pci_ad<31>|    2.086(R)|   -0.731(R)|    3.914|    0.731|        1.592|
io_pci_cbe<0>|    2.075(R)|   -0.718(R)|    3.925|    0.718|        1.604|
io_pci_cbe<1>|    2.052(R)|   -0.690(R)|    3.948|    0.690|        1.629|
io_pci_cbe<2>|    2.076(R)|   -0.719(R)|    3.924|    0.719|        1.603|
io_pci_cbe<3>|    2.042(R)|   -0.679(R)|    3.958|    0.679|        1.640|
io_pci_devsel|    4.166(R)|   -0.195(R)|    1.834|    0.195|        0.820|
io_pci_frame |    4.544(R)|   -0.217(R)|    1.456|    0.217|        0.619|
io_pci_irdy  |    2.939(R)|   -0.070(R)|    3.061|    0.070|        1.496|
io_pci_stop  |    3.983(R)|   -0.873(R)|    2.017|    0.873|        0.572|
io_pci_trdy  |    5.996(R)|   -0.757(R)|    0.004|    0.757|       -0.377|
-------------+------------+------------+---------+---------+-------------+
Worst Case   |            |            |         |         |             |
Summary      |       5.996|      -0.070|    0.004|    0.070|             |
-------------+------------+------------+---------+---------+-------------+

TIMEGRP "pci_in_10" OFFSET = IN 9 ns VALID 9 ns BEFORE COMP "in_pci_clock";
Worst Case Data Window 4.084; Ideal Clock Offset To Actual Clock -1.132; 
------------+------------+------------+---------+---------+-------------+
            |            |            |  Setup  |  Hold   |Source Offset|
Source      |   Setup    |    Hold    |  Slack  |  Slack  |  To Center  |
------------+------------+------------+---------+---------+-------------+
in_pci_gnt  |    5.410(R)|   -1.326(R)|    3.590|    1.326|        1.132|
------------+------------+------------+---------+---------+-------------+
Worst Case  |            |            |         |         |             |
Summary     |       5.410|      -1.326|    3.590|    1.326|             |
------------+------------+------------+---------+---------+-------------+

TIMEGRP "video_in" OFFSET = IN 1.37 ns VALID 4.24 ns BEFORE COMP         "in_video_clock" TIMEGRP video_rising;
Worst Case Data Window 1.360; Ideal Clock Offset To Actual Clock -0.029; 
-------------------+------------+------------+---------+---------+-------------+
                   |            |            |  Setup  |  Hold   |Source Offset|
Source             |   Setup    |    Hold    |  Slack  |  Slack  |  To Center  |
-------------------+------------+------------+---------+---------+-------------+
in_video_data<0>   |   -0.147(R)|    1.441(R)|    1.517|    1.429|        0.044|
in_video_data<1>   |   -0.163(R)|    1.459(R)|    1.533|    1.411|        0.061|
in_video_data<2>   |   -0.132(R)|    1.423(R)|    1.502|    1.447|        0.027|
in_video_data<3>   |   -0.119(R)|    1.408(R)|    1.489|    1.462|        0.014|
in_video_data<4>   |   -0.119(R)|    1.408(R)|    1.489|    1.462|        0.014|
in_video_data<5>   |   -0.117(R)|    1.406(R)|    1.487|    1.464|        0.012|
in_video_data<6>   |   -0.157(R)|    1.453(R)|    1.527|    1.417|        0.055|
in_video_data<7>   |   -0.163(R)|    1.459(R)|    1.533|    1.411|        0.061|
in_video_data<8>   |   -0.115(R)|    1.403(R)|    1.485|    1.467|        0.009|
in_video_data<9>   |   -0.115(R)|    1.403(R)|    1.485|    1.467|        0.009|
in_video_data<10>  |   -0.110(R)|    1.397(R)|    1.480|    1.473|        0.003|
in_video_data<11>  |   -0.110(R)|    1.397(R)|    1.480|    1.473|        0.003|
in_video_data<12>  |   -0.147(R)|    1.441(R)|    1.517|    1.429|        0.044|
in_video_data<13>  |   -0.124(R)|    1.414(R)|    1.494|    1.456|        0.019|
in_video_data<14>  |   -0.149(R)|    1.443(R)|    1.519|    1.427|        0.046|
in_video_horizontal|   -0.099(R)|    1.385(R)|    1.469|    1.485|       -0.008|
-------------------+------------+------------+---------+---------+-------------+
Worst Case         |            |            |         |         |             |
Summary            |      -0.099|       1.459|    1.469|    1.411|             |
-------------------+------------+------------+---------+---------+-------------+

TIMEGRP "video_in" OFFSET = IN -5.37 ns VALID 4.24 ns BEFORE COMP         "in_video_clock" TIMEGRP video_falling;
Worst Case Data Window 1.349; Ideal Clock Offset To Actual Clock -0.034; 
-----------------+------------+------------+---------+---------+-------------+
                 |            |            |  Setup  |  Hold   |Source Offset|
Source           |   Setup    |    Hold    |  Slack  |  Slack  |  To Center  |
-----------------+------------+------------+---------+---------+-------------+
in_video_data<0> |   -6.887(F)|    8.181(F)|    1.517|    1.429|        0.044|
in_video_data<1> |   -6.903(F)|    8.199(F)|    1.533|    1.411|        0.061|
in_video_data<2> |   -6.872(F)|    8.163(F)|    1.502|    1.447|        0.027|
in_video_data<3> |   -6.859(F)|    8.148(F)|    1.489|    1.462|        0.014|
in_video_data<4> |   -6.859(F)|    8.148(F)|    1.489|    1.462|        0.014|
in_video_data<5> |   -6.857(F)|    8.146(F)|    1.487|    1.464|        0.012|
in_video_data<6> |   -6.897(F)|    8.193(F)|    1.527|    1.417|        0.055|
in_video_data<7> |   -6.903(F)|    8.199(F)|    1.533|    1.411|        0.061|
in_video_data<8> |   -6.855(F)|    8.143(F)|    1.485|    1.467|        0.009|
in_video_data<9> |   -6.855(F)|    8.143(F)|    1.485|    1.467|        0.009|
in_video_data<10>|   -6.850(F)|    8.137(F)|    1.480|    1.473|        0.003|
in_video_data<11>|   -6.850(F)|    8.137(F)|    1.480|    1.473|        0.003|
in_video_data<12>|   -6.887(F)|    8.181(F)|    1.517|    1.429|        0.044|
in_video_data<13>|   -6.864(F)|    8.154(F)|    1.494|    1.456|        0.019|
in_video_data<14>|   -6.889(F)|    8.183(F)|    1.519|    1.427|        0.046|
-----------------+------------+------------+---------+---------+-------------+
Worst Case       |            |            |         |         |             |
Summary          |      -6.850|       8.199|    1.480|    1.411|             |
-----------------+------------+------------+---------+---------+-------------+

TIMEGRP "ram_in" OFFSET = IN 8 ns VALID 16 ns BEFORE COMP "in_pci_clock";
Worst Case Data Window 2.767; Ideal Clock Offset To Actual Clock 0.624; 
---------------+------------+------------+---------+---------+-------------+
               |            |            |  Setup  |  Hold   |Source Offset|
Source         |   Setup    |    Hold    |  Slack  |  Slack  |  To Center  |
---------------+------------+------------+---------+---------+-------------+
io_ram_data<0> |    1.932(R)|    0.733(R)|    6.068|    7.267|       -0.600|
io_ram_data<1> |    1.979(R)|    0.677(R)|    6.021|    7.323|       -0.651|
io_ram_data<2> |    1.979(R)|    0.677(R)|    6.021|    7.323|       -0.651|
io_ram_data<3> |    1.967(R)|    0.691(R)|    6.033|    7.309|       -0.638|
io_ram_data<4> |    1.950(R)|    0.712(R)|    6.050|    7.288|       -0.619|
io_ram_data<5> |    1.909(R)|    0.759(R)|    6.091|    7.241|       -0.575|
io_ram_data<6> |    1.909(R)|    0.759(R)|    6.091|    7.241|       -0.575|
io_ram_data<7> |    1.918(R)|    0.748(R)|    6.082|    7.252|       -0.585|
io_ram_data<8> |    1.991(R)|    0.663(R)|    6.009|    7.337|       -0.664|
io_ram_data<9> |    1.996(R)|    0.657(R)|    6.004|    7.343|       -0.670|
io_ram_data<10>|    1.990(R)|    0.664(R)|    6.010|    7.336|       -0.663|
io_ram_data<11>|    1.995(R)|    0.658(R)|    6.005|    7.342|       -0.668|
io_ram_data<12>|    1.995(R)|    0.658(R)|    6.005|    7.342|       -0.668|
io_ram_data<13>|    1.924(R)|    0.742(R)|    6.076|    7.258|       -0.591|
io_ram_data<14>|    1.924(R)|    0.742(R)|    6.076|    7.258|       -0.591|
io_ram_data<15>|    1.932(R)|    0.733(R)|    6.068|    7.267|       -0.600|
io_ram_data<16>|    1.918(R)|    0.748(R)|    6.082|    7.252|       -0.585|
io_ram_data<17>|    1.977(R)|    0.679(R)|    6.023|    7.321|       -0.649|
io_ram_data<18>|    1.977(R)|    0.679(R)|    6.023|    7.321|       -0.649|
io_ram_data<19>|    1.957(R)|    0.702(R)|    6.043|    7.298|       -0.627|
io_ram_data<20>|    1.957(R)|    0.702(R)|    6.043|    7.298|       -0.627|
io_ram_data<21>|    1.944(R)|    0.718(R)|    6.056|    7.282|       -0.613|
io_ram_data<22>|    1.944(R)|    0.718(R)|    6.056|    7.282|       -0.613|
io_ram_data<23>|    1.982(R)|    0.673(R)|    6.018|    7.327|       -0.655|
io_ram_data<24>|    1.987(R)|    0.667(R)|    6.013|    7.333|       -0.660|
io_ram_data<25>|    2.008(R)|    0.643(R)|    5.992|    7.357|       -0.683|
io_ram_data<26>|    2.008(R)|    0.643(R)|    5.992|    7.357|       -0.683|
io_ram_data<27>|    1.957(R)|    0.702(R)|    6.043|    7.298|       -0.627|
io_ram_data<28>|    1.957(R)|    0.702(R)|    6.043|    7.298|       -0.627|
io_ram_data<29>|    1.957(R)|    0.702(R)|    6.043|    7.298|       -0.627|
io_ram_data<30>|    1.960(R)|    0.699(R)|    6.040|    7.301|       -0.631|
io_ram_data<31>|    1.960(R)|    0.699(R)|    6.040|    7.301|       -0.631|
---------------+------------+------------+---------+---------+-------------+
Worst Case     |            |            |         |         |             |
Summary        |       2.008|       0.759|    5.992|    7.241|             |
---------------+------------+------------+---------+---------+-------------+

TIMEGRP "pci_out_11" OFFSET = OUT 10 ns AFTER COMP "in_pci_clock";
Largest slack: 2.923 ns; Smallest slack: 0.166 ns; Relative Skew: 2.757 ns; 
-----------------------------------------------+-------------+-------------+
PAD                                            |    Slack    |Relative Skew|
-----------------------------------------------+-------------+-------------+
io_pci_ad<0>                                   |        0.526|        2.397|
io_pci_ad<1>                                   |        0.242|        2.681|
io_pci_ad<2>                                   |        1.522|        1.401|
io_pci_ad<3>                                   |        1.394|        1.529|
io_pci_ad<4>                                   |        1.455|        1.468|
io_pci_ad<5>                                   |        1.542|        1.381|
io_pci_ad<6>                                   |        1.549|        1.374|
io_pci_ad<7>                                   |        0.242|        2.681|
io_pci_ad<8>                                   |        1.897|        1.026|
io_pci_ad<9>                                   |        2.172|        0.751|
io_pci_ad<10>                                  |        1.623|        1.300|
io_pci_ad<11>                                  |        2.092|        0.831|
io_pci_ad<12>                                  |        2.473|        0.450|
io_pci_ad<13>                                  |        1.903|        1.020|
io_pci_ad<14>                                  |        2.602|        0.321|
io_pci_ad<15>                                  |        2.341|        0.582|
io_pci_ad<16>                                  |        1.650|        1.273|
io_pci_ad<17>                                  |        1.381|        1.542|
io_pci_ad<18>                                  |        1.298|        1.625|
io_pci_ad<19>                                  |        1.723|        1.200|
io_pci_ad<20>                                  |        0.193|        2.730|
io_pci_ad<21>                                  |        0.201|        2.722|
io_pci_ad<22>                                  |        0.181|        2.742|
io_pci_ad<23>                                  |        1.712|        1.211|
io_pci_ad<24>                                  |        0.172|        2.751|
io_pci_ad<25>                                  |        0.179|        2.744|
io_pci_ad<26>                                  |        1.146|        1.777|
io_pci_ad<27>                                  |        0.193|        2.730|
io_pci_ad<28>                                  |        0.166|        2.757|
io_pci_ad<29>                                  |        0.198|        2.725|
io_pci_ad<30>                                  |        1.445|        1.478|
io_pci_ad<31>                                  |        0.181|        2.742|
io_pci_cbe<0>                                  |        2.923|        0.000|
io_pci_cbe<1>                                  |        2.347|        0.576|
io_pci_cbe<2>                                  |        2.095|        0.828|
io_pci_cbe<3>                                  |        0.232|        2.691|
io_pci_devsel                                  |        2.287|        0.636|
io_pci_frame                                   |        1.752|        1.171|
io_pci_irdy                                    |        2.067|        0.856|
io_pci_stop                                    |        1.538|        1.385|
io_pci_trdy                                    |        1.818|        1.105|
out_pci_par                                    |        2.219|        0.704|
-----------------------------------------------+-------------+-------------+

TIMEGRP "pci_out_12" OFFSET = OUT 11 ns AFTER COMP "in_pci_clock";
Largest slack: 3.946 ns; Smallest slack: 3.946 ns; Relative Skew: 0.000 ns; 
-----------------------------------------------+-------------+-------------+
PAD                                            |    Slack    |Relative Skew|
-----------------------------------------------+-------------+-------------+
out_pci_req                                    |        3.946|        0.000|
-----------------------------------------------+-------------+-------------+

TIMEGRP "ram_out" OFFSET = OUT 15 ns AFTER COMP "in_pci_clock";
Largest slack: 6.506 ns; Smallest slack: 1.880 ns; Relative Skew: 4.626 ns; 
-----------------------------------------------+-------------+-------------+
PAD                                            |    Slack    |Relative Skew|
-----------------------------------------------+-------------+-------------+
io_ram_data<0>                                 |        4.219|        2.287|
io_ram_data<1>                                 |        5.239|        1.267|
io_ram_data<2>                                 |        5.818|        0.688|
io_ram_data<3>                                 |        4.978|        1.528|
io_ram_data<4>                                 |        4.707|        1.799|
io_ram_data<5>                                 |        4.658|        1.848|
io_ram_data<6>                                 |        4.736|        1.770|
io_ram_data<7>                                 |        4.467|        2.039|
io_ram_data<8>                                 |        3.858|        2.648|
io_ram_data<9>                                 |        4.226|        2.280|
io_ram_data<10>                                |        4.531|        1.975|
io_ram_data<11>                                |        4.643|        1.863|
io_ram_data<12>                                |        4.260|        2.246|
io_ram_data<13>                                |        4.369|        2.137|
io_ram_data<14>                                |        4.514|        1.992|
io_ram_data<15>                                |        4.107|        2.399|
io_ram_data<16>                                |        4.389|        2.117|
io_ram_data<17>                                |        4.396|        2.110|
io_ram_data<18>                                |        4.354|        2.152|
io_ram_data<19>                                |        4.028|        2.478|
io_ram_data<20>                                |        4.304|        2.202|
io_ram_data<21>                                |        4.028|        2.478|
io_ram_data<22>                                |        4.304|        2.202|
io_ram_data<23>                                |        5.265|        1.241|
io_ram_data<24>                                |        1.880|        4.626|
io_ram_data<25>                                |        2.423|        4.083|
io_ram_data<26>                                |        2.413|        4.093|
io_ram_data<27>                                |        2.897|        3.609|
io_ram_data<28>                                |        2.700|        3.806|
io_ram_data<29>                                |        2.994|        3.512|
io_ram_data<30>                                |        3.294|        3.212|
io_ram_data<31>                                |        3.965|        2.541|
out_ram_address<0>                             |        6.450|        0.056|
out_ram_address<1>                             |        6.479|        0.027|
out_ram_address<2>                             |        6.468|        0.038|
out_ram_address<3>                             |        6.396|        0.110|
out_ram_address<4>                             |        6.466|        0.040|
out_ram_address<5>                             |        6.466|        0.040|
out_ram_address<6>                             |        6.506|        0.000|
out_ram_address<7>                             |        6.477|        0.029|
out_ram_address<8>                             |        6.490|        0.016|
out_ram_address<9>                             |        6.476|        0.030|
out_ram_address<10>                            |        6.479|        0.027|
out_ram_bank<0>                                |        6.435|        0.071|
out_ram_bank<1>                                |        6.429|        0.077|
out_ram_col_address                            |        6.377|        0.129|
out_ram_row_address                            |        6.377|        0.129|
out_ram_write_enable                           |        6.447|        0.059|
-----------------------------------------------+-------------+-------------+


Timing summary:
---------------

Timing errors: 0  Score: 0

Constraints cover 90706 paths, 0 nets, and 10544 connections

Design statistics:
   Minimum period:  17.001ns   (Maximum frequency:  58.820MHz)
   Minimum input required time before clock:   5.996ns
   Minimum output required time after clock:  13.120ns


Analysis completed SAT 8 SEP 9:38:59 2007 
--------------------------------------------------------------------------------

Trace Settings:
-------------------------
Trace Settings 

Peak Memory Usage: 170 MB